Description

How can I run the built-in self test (BIST) and capture the bit error rate (BER) for the Speedster7t AC7t1500 SerDes using ACE?

Answer

The BIST runs a BER test in loopback mode. This test mainly includes procedures for initialization, link-training, equalization and BER checker. The following test steps can be used directly in the ACE Tcl console or run the example script (attached to this article). The script assumes familiarity with opening and closing JTAG access to the device.

Figure: Loopback Connection With QSFP-DD Connection Module

The example Tcl script attached to this article runs the external loop BIST on four lanes of the VectorPath accelerator card. The script can be run as is or the following detailed steps can be used to run the Tcl script lane-by-lane manually.

Step 1: Open, Initialize and Establish the JTAG Link to the DUT

# Get jtag_id
set VP_jtag_id [jtag::get_connected_devices]
puts "Found connected device $VP_jtag_id"
set jtag_id $VP_jtag_id
# When running under ACE, ensure JTAG port is open
puts "Open the JTAG interface"
ac7t1500::open_jtag
#initialize JTAG, for ES0 device use ES0; for ES1 device use ES1
jtag::configure_scan_chain
$jtag_id AC7t1500ES0 0 0 0
jtag::ac7t1500_initialize_fcu $jtag_id -reset

Step 2: Program the DUT and Source the Device Libraries

set bs "G:/<folder_name>/.../.../bringup_5G_trial_12345678.hex"
ac7t1500::program_hex_file $bs
#Source common utility functions
source AC7t1500ES0_common_utils.tcl
#Source SerDes utility functions
source AC7t1500ES0_serdes_utils.tcl

Step 3: IP, Quad, Lanes Configurations

Multi-Lane configuration variables are set as follows:

#user can set different ip such as ETHERNET_0 ETHERNET_1 PCIE_0 PCIE_1
set target_all {ETHERNET_0 ETHERNET_1}
set ip_all {SERDES_0 SERDES_1}
set lane_all {0 1 2 3}

Alternatively, single-lane configuration variables are set as follows:

set target_all {ETHERNET_1}
set ip_all {SERDES_0}
set lane_all {0}

Step 4: Select a PRBS Pattern and Enable BIST

serdes_utils::tx_rx_state_req $target $ip 0
aw_lib::write_reg_offset $space $target $ip $lane rxmfsm_scratch_reg7 0 27 1
set pattern "PRBS31"
ac7t1500::write_comment_line "Running command:  aw_lib::tx_set_bist $space $target $ip $lane 1 $pattern 0 0"
aw_lib::tx_set_bist $space $target $ip $lane 1 $pattern $udp_63_32 $udp_31_0

Step 5: Enable Loopback Mode

Enable loopback using the external near-end serial trasnmitter-to-receiver mode as follows:

#if external loop
$nes = 0
#if internal loop
#$nes = 1

Step 6: Reset Transmitter and Receiver

Reset the transmitter and receiver as follows:

ac7t1500::write_comment_line "clear tx_rx state req, for $target $ip"
serdes_utils::tx_rx_state_req $target $ip 0

Step 7: Initialize Link Training for the Transmitter and Receiver

aw_lib::tx_fir_set $space $target $ip $lane 0 0 0 63 0
aw_lib::rx_ovrd_eqeval_req_set $space $target $ip $lane 1 1000
lassign [aw_lib::rx_lt_get_state $space $target $ip $lane] cm1_incdec c0_incdec c1_incdec linkeval_state
aw_lib::tx_lt_adjust $space $target $ip $lane 0 0 $cm1_incdec $c0_incdec $c1_incdec

Step 8: Run Receiver Equalization

ac7t1500::write_comment_line "START  RX, EQ  for $target"
puts  "Rx EqEval ACK/DIR: [aw_lib::rx_ovrd_eqeval_req_set $space $target $ip $lane 0 1000]"
ac7t1500::write_comment_line "END    RX, EQ for $target"

Step 9: Initialize BIST

aw_lib::rx_check_cdr_lock $space $target $ip $lane
aw_lib::rx_set_bist $space $target $ip $lane 1 1 $pattern 0 0 0x7ffffff 2 $bist_time

Step 10: Check BIST Status and Test Results

To check BIST status, read BER, error counts and error counter overflow status, issue the following command

aw_lib::rx_check_bist $space $target $ip $lane $bitrate $bist_time

Note:

1. This SerDes does not support a total bit count. If the error counter overflows, the overflow status is shown as 1.
2. BER and error counts should normally be zero. Optionally, inject errors from the transmitter to verify if BER and error counts are working correctly.

Step 11: Check BIST Final Lock Status

aw_lib::write_field $space $target $ip $lane rx_databist_top_reg1 bist_enable_a 1
aw_lib::rx_check_bist_lock $space $target $ip $lane
aw_lib::write_field $space $target $ip $lane rx_databist_top_reg1 bist_enable_a 0

Step 12: Close the JTAG Connection After BIST Completes

#after BIST test done, close jtag connection
jtag::close $jtag_id

Tcl Script